This specification relates to hardware performance counters.
Hardware performance counters are registers built into microprocessors to store counts of hardware-related activities. Each counter can be programmed to monitor an event, e.g., retired instructions, cache misses, or elapsed time. Each counter has access to components of the microprocessor, e.g., caches. Developers can rely on the hardware performance counters to conduct performance analysis or debugging.
Another way developers can conduct performance analysis is by the use of binary translators. Binary translators translate input code into a modified and instrumented functionally-equivalent version of the input code and monitor the performance of the modified code as part of a performance analysis process.